<p id="isPasted">RISC-V is inevitable - it became the mantra of RISC-V, and it's true. But before we see why that is, let’s step back and discuss what RISC-V is and why we should care.</p><p>Back in the early days, computers were large and bulky, taking up entire rooms and making a lot of noise.</p><p>It's incredible to think about how much technology has advanced over the years. Nowadays, we're surrounded by microprocessors that make our lives easier without us even realizing it. For example, when we use our bank cards to pay at the supermarket, we're actually using a full computer that encrypts, signs and verifies our transactions. And our phones contain dozens and dozens of processors that make all the conveniences of modern life possible.</p><h2>What is RISC-V?</h2><p>RISC-V (Reduced Instruction Set Computers) is an open-source Instruction Set Architecture (ISA). You may have heard of other well-known ISAs such as x86, ARM, Power, and MIPS.&nbsp;</p><p>The RISC-V ISA is the common, standardized language between the processor (hardware) and the programs running on it (software). With RISC-V, the processor itself can only do very basic things, such as (conditionally) adding or subtracting two numbers and deciding what to do based on those arithmetic outcomes. It can also repeat those arithmetic operations several times until a certain condition is reached. In fact, there are only 37 instructions in the base. But these are the very basic ingredients needed to describe essentially any problem to the processor.&nbsp;</p><p>We call those commands, instructions.&nbsp;</p><p>By defining the exact meaning (semantic) and spelling (syntax) of those instructions, you can start to build a common understanding between the processor and the software running on it. You can think of the ISA as a dictionary. The ISA of RISC-V is free for anyone to access here. This is incredibly important because today’s software has become so complex that no single company can manage it alone and a common standard ensures interoperability.&nbsp;</p><p>RISC-V came to the right place, by the right people, at the right time.&nbsp;</p><p>David Patterson, a visionary in the field of computer architecture, spearheaded the development of Reduced Instruction Set Computers (RISC) at Berkeley. The project went through five iterations, which ultimately led to the creation of the RISC-V architecture.</p><p>Initially, RISC-V mainly piqued academic curiosity. However, the availability of open-source processor implementations, coupled with rising geopolitical tensions, quickly drew industrial interest as well. From that point, the project experienced a snowball effect gaining momentum and broader adoption.</p><h2>Open source breeds innovation</h2><p>The primary advantage of RISC-V lies in its licensing flexibility. Although the specifications for other ISAs are publicly available, legal constraints prevent you from implementing and selling processor hardware unless you have obtained a license for the ISA specification. With RISC-V, this limitation is removed, offering greater freedom for innovation and commercialization.</p><p>The limits that most ISAs have reduce their use by smaller innovators. For example, the widely used ISA “x86” allows only a handful of licensees. Arm, another well-known provider of processor IP, has an entirely different business model. They are selling processor IPs that can be licensed and integrated into your product. Only the biggest players in the market are able to own an architectural license that allows them to implement their own processors.&nbsp;</p><p>Most notable of these is Apple, which switched its entire product line from Intel x86 processors to its own Arm implementation. Their investment in this endeavor proved to be a wise decision both technically and economically, as it enabled them to distinguish their product line even further and surpass their rivals by a significant margin.</p><p>In the past, designing your own processor and utilizing the expansive software ecosystem was thought to be reserved solely for large corporations. However, that's not entirely true. Alternatives like OpenRISC existed, but they weren't widely adopted because their software ecosystems were underdeveloped, and they were often considered hobbyist projects.</p><p>Another notable benefit of RISC-V is its built-in modularity, which contrasts with ARM's more rigid structure. The RISC-V architecture is designed from the ground up to be modular, allowing for easier customization and innovation. While ARM tightly controls and protects its ISA specification, making it difficult to introduce your own specialized features, RISC-V offers the flexibility to add custom extensions and your “secret sauce.”</p><p>This is particularly advantageous if you aim to target specific market segments and differentiate your product from competitors. Remember those 37 instructions I’ve mentioned? Turns out this is only the very base instruction set. For most applications, you would likely want to include some more specialized instructions such as floating-point support, atomic memory operations, or maybe even scalable vector extensions. You don’t need to, but you can. In the same way, your company could add your own instructions in case those are beneficial for the application in mind. This means you can still leverage the entire software ecosystem that has been and is being built and only add value on top instead of reinventing the wheel. So let’s have a look at some of these advantages.&nbsp;</p><h2>How can RISC-V help start-ups design their own chips?</h2><p>For me, the two most important aspects for a hardware-producing start-up are time-to-market and freedom to innovate.&nbsp;</p><p>Most silicon/hardware start-ups innovate and try to provide value-add in their niche. The processor is a necessary, boring commodity and usually not the main star of the product. This is good and the way it should be. Otherwise, we would all be selling the same processors.&nbsp;</p><p>RISC-V is an absolute game changer for that.&nbsp;</p><p>Do you want to quickly try out an integration idea? Prototype something on an FPGA? Before RISC-V this either meant you needed to use some custom FPGA vendor’s ISA (which you couldn’t send to manufacture for your final product) or start negotiations with the processor vendor of your choice. Negotiations are hard for a small silicon start-up. With RISC-V you can go and grab some core from the internet, do your trials, and start building your software stack. Once happy with the prototype and you want to move forward, there are a plethora of RISC-V IP vendors you can choose from. Choice and market competition are a good thing.</p><p>Expanding on the points raised earlier, the freedom to innovate with RISC-V comes without the risk of architectural lock-in. This has two advantages, first, you are free to switch IP vendors. Your software stack will still work the same because you adhered to an open standard. Second, you can provide your own extensions on top of the main RISC-V standards, and the company can provide very concentrated value-add without the need to maintain or develop commodity.&nbsp;</p><h3>Let’s have a look at what we’ve done at Axelera.&nbsp;</h3><p>At the heart of our Metis AI Processing Unit, there are four AI Cores. Each AI core provides a 512x512 matrix-vector multiplication (MVM) in-memory compute array and a vector datapath that operates on streams of data.&nbsp;</p><p>To provide a generic solution that can keep up with the fast evolution in the field of neural networks we kept the datapath control as flexible as possible. We aim to push as much as possible into low-level driver software where we can innovate, correct, and adapt throughout the product’s life cycle. Therefore, each AI Core has a dedicated RISC-V, application-class core, that has full control over the datapath unit. A 5th system controller provides SoC management and workload dispatch to the individual AI cores. We’ve confidently chosen the RISC-V ISA because we could start virtual prototyping and building our software stack on open and free software far before we had done any IP negotiations. Furthermore, we knew that the IP landscape would provide us with sufficient competitive choices for our needs.</p><p>&nbsp;In roughly a year, we went from concept/FPGA prototype to tape-out, and in just a couple of days after having received the chips back, we could run the first end-to-end neural networks on our lab benches. Taking the limited resources and this aggressive time schedule into account it was clear that we’ll needed to buy proven IP without long negotiations to kick-start our developments.&nbsp;</p><p>Choosing to proceed with RISC-V ensured that we could continue to innovate in future generations and further distinguish our offerings.</p><p>So, is it all love, peace, and harmony? Not exactly. Like anything that's still a work in progress. RISC-V has its own set of hiccups and curveballs.</p><p>An ISA is mainly about instructions, but a processor is part of a bigger system that includes memory, peripherals, and other processors. This broader setup, often called a platform, isn't covered in the main ISA spec. The RISC-V Foundation aims to standardize these aspects too.</p><p>However, details matter. Things like atomic handling in multi-hart systems may only be standardized for specific platforms. Also, some IP providers might have legacy elements because they developed solutions before RISC-V standards were set. Standards are scattered, so you have to keep an eye out. And given the rapid growth, it's tough to stay updated on all the ongoing activities.</p><h2>Looking ahead</h2><p>Remember those room-filling mainframes and how technology has continuously shrunk down to fit our pockets and wrists? Just like those evolutionary leaps, RISC-V aims to be a cornerstone in the next phase of computational progress.</p><p>In an ideal future, RISC-V will be as "boring" as any well-established technology—boring in the sense that it's reliable, stable, and so embedded in our daily lives that we take it for granted. The long-term vision is for software to run seamlessly on RISC-V-based processors without users having to worry about compatibility issues.</p><p>In the short term, however, there's still much to be done. While RISC-V is showing promise in deeply embedded systems like smartcards and IoT devices, achieving the same level of support and efficiency as ARM and x86 in more user-centric applications—like your phone or computer—is an ongoing project. Industry trends, as evidenced by companies like SiFive and Ventana and initiatives like the RISE project, suggest a competitive and collaborative future for RISC-V. From a research standpoint, its open nature makes it a fertile ground for innovation across the entire hardware-to-software stack.</p><p>There's a palpable sense of momentum behind RISC-V, with heavyweight stakeholders and top-tier companies pooling their resources and expertise. Far from slowing down, the ecosystem around RISC-V is only gaining speed, setting it on a course to become as ubiquitous and "boring" as the microprocessors that have come to define modern life.&nbsp;</p><p>So, looking at where things are going, ignoring RISC-V would be like missing the boat when we switched from those giant mainframes to desktop PCs. It's a game-changer, and you really don't want to be left behind.</p>

RISC-V Evolution: From Early Computing to Tomorrow's Tech Promise 

Harnessing the RISC-V Wave: The Future is Now

<p><em id="isPasted">This is the first in a series of articles, from Synopsys that look at&nbsp;</em><a href="https://www.wevolver.com/article/designing-energy-efficient-ai-accelerators-for-data-centers-and-the-intelligent-edge" target="_blank" rel="noopener noreferrer"><em id="isPasted">AI</em></a><em id="isPasted">, automotive, and multi-die chip design.&nbsp;</em></p><h2>Introduction</h2><p id="isPasted">According to Allied Market Research, the global artificial intelligence (AI) chip market is projected to reach $263.6 billion by 2031. The AI chip market is vast and can be segmented in a variety of different ways, including chip type, processing type, technology, application, industry vertical, and more. However, the two main areas where AI chips are being used are at the edge (such as the chips that power your phone and smartwatch) and in data centers (for deep learning inference and training).</p><p id="isPasted">No matter the application, however, all <a href="https://www.synopsys.com/ai/ai-powered-eda.html" target="_blank">AI chips</a> can be defined as <a href="https://www.synopsys.com/glossary/what-is-ic-design.html" target="_blank">integrated circuits (ICs)</a> that have been engineered to run machine learning workloads and may consist of FPGAs, GPUs, or custom-built ASIC AI accelerators. They work very much like how our human brains operate and process decisions and tasks in our complicated and fast-moving world. The true differentiator between a traditional chip and an AI chip is how much and what type of data it can process and how many calculations it can do at the same time. At the same time, new software AI algorithmic breakthroughs are driving new AI chip architectures to enable efficient deep learning computation.</p><p>Read on to learn more about the unique demands of AI, the many benefits of an AI chip architecture, and finally the applications and future of the AI chip architecture.</p><section id="isPasted"><h2>The Distinct Requirements of AI Chips</h2><p>The AI workload is so strenuous and demanding that the industry couldn’t efficiently and cost-effectively design AI chips before the 2010s due to the compute power it required—orders of magnitude more than traditional workloads. AI requires massive parallelism of multiply-accumulate functions such as dot product functions. Traditional GPUs were able to do parallelism in a similar way for graphics, so they were re-used for AI applications.</p><p>The optimization we’ve seen in the last decade is drastic. AI requires a chip architecture with the right processors, arrays of memories, robust security, and reliable real-time data connectivity between sensors. Ultimately, the best AI chip architecture is the one that condenses the most compute elements and memory into a single chip. Today, we’re moving into multiple chip systems for AI as well since we are reaching the limits of what we can do on one chip.</p><p>Chip designers need to take into account parameters called weights and activations as they design for the maximum size of the activation value. Looking ahead, being able to take into account both software and hardware design for AI is extremely important in order to optimize AI chip architecture for greater efficiency.</p></section><section><h2>The Benefits of AI Chip Architecture</h2><p>There’s no doubt that we are in the renaissance of AI. Now that we are overcoming the obstacles of designing chips that can handle the AI workload, there are many innovative companies that are experts in the field and designing better AI chips to do things that would have seemed very much out of reach a decade ago.</p><p>As you move down process nodes, AI chip designs can result in 15 to 20% less clocking speed and 15 to 30% more density, which allows designers to fit more compute elements on a chip. They also increase memory components that allow AI technology to be trained in minutes vs. hours, which translates into substantial savings. This is especially true when companies are renting space from an online data center to design AI chips, but even those using in-house resources can benefit by conducting trial and error much more effectively.</p><p>We are now at the point where AI itself is being used to design new AI chip architectures and calculate new optimization paths to optimize power, performance, and area (PPA) based on big data from many different industries and applications.</p></section><section><h2>AI Chip Architecture Applications and the Future Ahead</h2><p>AI is all around us quite literally. AI processors are being put into almost every type of chip, from the smallest IoT chips to the largest servers, data centers, and graphic accelerators. The industries that require higher performance will of course utilize AI chip architecture more, but as AI chips become cheaper to produce, we will begin to see AI chip architecture in places like IoT to optimize power and other types of optimizations that we may not even know are possible yet.</p><p>It’s an exciting time for AI chip architecture. Synopsys predicts that we’ll continue to see next-generation process nodes adopted aggressively because of the performance needs. Additionally, there’s already much exploration around different types of memory as well as different types of processor technologies and the software components that go along with each of these.</p><p>In terms of memory, chip designers are beginning to put memory right next to or even within the actual computing elements of the hardware to make processing time much faster. Additionally, software is driving the hardware, meaning that software AI models such as new neural networks are requiring new AI chip architectures. Proven, real-time interfaces deliver the data connectivity required with high speed and low latency, while security protects the overall systems and their data.</p><p>Finally, we’ll see photonics and multi-die systems come more into play for new AI chip architectures to overcome some of the AI chip bottlenecks. Photonics provides a much more power-efficient way to do computing and multi-die systems (which involve the heterogeneous integration of dies, often with memory stacked directly on top of compute boards) can also improve performance as the possible connection speed between different processing elements and between processing and memory units increases.</p><p>One thing is for sure: Innovations in AI chip architecture will continue to abound, and Synopsys will have a front-row seat and a hand in them as we help our customers design next-generation AI chips in an array of industries.</p><p>Read more about how <a href="https://wevlv.co/synopsys-chip-arch" target="_blank" rel="noopener noreferrer">Synopsys is tackling AI chip architecture challenges</a>.</p></section>

AI chips, designed for machine learning tasks, are spurring new chip architectures for efficient deep learning computation. 

Why AI Requires a New Chip Architecture

<h2 dir="ltr" id="isPasted">Introduction</h2><p dir="ltr">Apache Kafka is a popular open-source distributed streaming platform that was developed by the Apache Software Foundation (Kafka, 2023). It is used to build real-time data pipelines and streaming applications that handle large volumes of data. Apache Kafka is designed to provide scalable, reliable, and fast data services making it a popular choice for data engineers and software developers. In this blog post, we will discuss what Apache Kafka is, how it works, and its pros and cons especially for the autonomous vehicle industry.</p><h2 dir="ltr">What is Apache Kafka?</h2><p dir="ltr">Apache Kafka is a distributed streaming platform that was first released in 2011. It is built on top of the Apache ZooKeeper, which is a centralized service for maintaining configuration information, naming, providing distributed synchronization, and providing group services. It is designed to handle high volumes of data and provide real-time access to that data.</p><p dir="ltr">Apache Kafka is a publish-subscribe-based messaging system, which means that producers publish messages to topics, and consumers subscribe to those topics to receive messages. It also provides support for multiple consumer groups, which allows consumers to read messages in parallel. This makes it a highly scalable messaging system that can handle large volumes of data with low latency.</p><h2 dir="ltr">Advantages of Apache Kafka</h2><p dir="ltr">Apache Kafka has several advantages over traditional messaging systems.&nbsp;</p><p dir="ltr">Scalability:&nbsp;Apache Kafka is highly scalable and can handle large volumes of data. Kafka can reliably process and store petabytes of data, making it a popular choice for large-scale data processing.&nbsp;</p><p dir="ltr">Real-time Access to data:&nbsp;It provides real-time access to data, which means that consumers can receive data as soon as it is produced. This makes it ideal for real-time data processing applications, such as fraud detection, real-time analytics, and monitoring.&nbsp;</p><p dir="ltr">Fault-tolerance:&nbsp;Apache Kafka is designed to handle failures and continue to operate without interruptions. Kafka provides a high level of durability, ensuring that data is never lost.&nbsp;</p><p dir="ltr">Multiple consumer groups:&nbsp;This feature allows consumers from multiple groups to read messages in parallel. This makes it possible to process large volumes of data in real-time.&nbsp;</p><h2 dir="ltr">Disadvantages of Apache Kafka</h2><p dir="ltr">While Apache Kafka has several advantages, there are also many challenges to its successful integration with existing systems.&nbsp;</p><p dir="ltr">Resource requirement:&nbsp;Apache Kafka requires a significant amount of resources, including memory and processing power. This can make it challenging to deploy on low-end hardware or in resource-constrained environments.&nbsp;</p><p dir="ltr">Complexity:&nbsp;Apache Kafka presents a steep learning curve, and it may be difficult for beginners to learn and set up. Kafka requires a good understanding of distributed systems and messaging architectures, which can be challenging for new users.&nbsp;</p><p dir="ltr">Scalability:&nbsp;It may not be suitable for small-scale applications or applications that do not require real-time data access. The overhead of setting up a Kafka cluster may outweigh the benefits for small-scale applications.</p><h2 dir="ltr">Apache Kafka and Uncrewed Vehicles</h2><p dir="ltr">Apache Kafka can provide numerous data streamlining applications to the uncrewed vehicles industry. Unmanned and autonomous vehicles are becoming widely used in a number of applications such as delivery, disaster relief, monitoring and mapping etc. They are routinely deployed to collect huge amounts of data through connected sensors and cameras. This data is then communicated to base stations and other vehicles. When operating in a remote or shared environment, unmanned vehicles need to share data with other entities as well. For example, in a disaster relief scenario, unmanned drones can be used to make 3D maps of the affected area, detect survivors and provide critical supplies. Huge amount of data is collected by swarms of unmanned vehicles and relief workers organize the best response based on this data. This is possible only when a robust data communication infrastructure exists in which the autonomous vehicles, their base stations, and the police and emergency departments of the area are involved.&nbsp;</p><p dir="ltr">Apache Kafka can help in processing this data in real-time from uncrewed vehicles, such as drones, self-driving cars, and autonomous robots (Bear, 2017). The data can be processed in real-time, and the results can be used for further analysis and to make decisions that can help the vehicles navigate safely and avoid collisions. Apache Kafka was utilized to demonstrate a connected automotive infrastructure of 100,000 cars in 2020 (Waehner, 2020), (Waehner, 2020). Such an infrastructure can be extended to self-driving cars and other autonomous vehicles to streamline data.&nbsp;</p><h2 dir="ltr">Conclusion</h2><p dir="ltr">Apache Kafka is a distributed streaming platform that is used for building real-time data pipelines and streaming applications. It is highly scalable, fault-tolerant, and provides real-time access to data. However, it is a complex system of data streamlining hence, it presents a steep learning curve for beginners. It is ideal for large scale systems where resources such as memory and processing are not an issue. Unmanned vehicle applications where large amount of data is being collected and communicated in real time, offer perfect opportunities for the deployment of Apache Kafka.</p><hr><h2 dir="ltr">References</h2><p dir="ltr">Bear, J. W., 2017. IoT and the Autonomous Vehicle in the Clouds: SLAM with Kafka and Spark Streaming. Inside Machine Learning.</p><p dir="ltr">Kafka, 2023. Apache Kafka. [Online]&nbsp;<br>Available at: https://kafka.apache.org/</p><p dir="ltr">Waehner, K., 2020. Apache Kafka in the Automotive Industry. [Online]&nbsp;<br>Available at: https://www.kai-waehner.de/blog/2019/11/22/apache-kafka-automotive-industry-industrial-iot-iiot/</p><p dir="ltr">Waehner, k., 2020. Streaming Machine Learning at Scale from 100000 IoT Devices with HiveMQ, Apache Kafka and TensorFLow. [Online]&nbsp;<br>Available at: https://github.com/kaiwaehner/hivemq-mqtt-tensorflow-kafka-realtime-iot-machine-learning-training-inference</p>

Apache Kafka is a popular open-source distributed streaming platform that was developed by the Apache Software Foundation (Kafka, 2023). It is used to build real-time data pipelines and streaming applications that handle large volumes of data.

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Harnessing the RISC-V Wave: The Future is Now

Why AI Requires a New Chip Architecture

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